;   ***************************************************************
;   * Copyright (C) 2003, Embed Inc (http://www.embedinc.com)     *
;   *                                                             *
;   * Permission to copy this file is granted as long as this     *
;   * copyright notice is included in its entirety at the         *
;   * beginning of the file, whether the file is copied in whole  *
;   * or in part and regardless of whether other information is   *
;   * added to the copy.                                          *
;   *                                                             *
;   * The contents of this file may be used in any way,           *
;   * commercial or otherwise.  This file is provided "as is",    *
;   * and Embed Inc makes no claims of suitability for a          *
;   * particular purpose nor assumes any liability resulting from *
;   * its use.                                                    *
;   ***************************************************************
;
;   Top module for the QQQ project.  See the QQQ.INS.DSPIC include
;   file for a description of the project.
;
/include "qq1.ins.dspic"
;
;***********************************************************************
;
;   Static processor configuration settings.
;
config   __FOSC, 0b1111111111110111
                 ; --XXXX--XXXX----  unused
                 ; 11--------------  disable clock switching
                 ; ------11--------  select primary oscillator
                 ; ------------0111  4-10MHz crystal, 16x PLL

;                ; ------------0110  4-10MHz crystal, 8x PLL

config   __FWDT, 0b0111111111111111
                 ; -XXXXXXXXX------  unused
                 ; 0---------------  disable watchdog timer
                 ; ----------XX----  watchdog timer prescaler A
                 ; ------------XXXX  watchdog timer prescaler B

config   __FBORPOR, 0b1111111111001111
                 ;    -XXXX----X--XX--  unused
                 ;    1---------------  enable MCLR pin as MCLR
                 ;    -----1----------  motor control PWM pins wake high Z
                 ;    ------XX--------  motor control PWM pins wakeup polarity
                 ;    --------1-------  enable brown out reset
                 ;    ----------00----  select 4.5V low voltage threshold
                 ;    --------------11  select maximum power on reset time (64mS)

config   __FGS,  0b1111111111111111
                 ; XXXXXXXXXXXXXX--  unused
                 ; --------------1-  disable program memory code protection
                 ; ---------------1  disable program memory write protection
;
;***********************************************************************
;
;   Reserve RAM for the ICD2.  It needs exclusive control over the first
;   80 bytes.
;
; .equiv   __ICD2RAM, 1        ;linker reserves ICD2 RAM when this symbol defined
; .global  __ICD2RAM

;
;***********************************************************************
;
;   Define the global flag words.  These are defined in near RAM so that bit
;   manipulation instructions can be used on them directly.  NFLAGB flag words
;   need to be defined.
;
.section .nbss, "b"

.irp     ii, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9
  .if \ii < nflagb           ;this GFLn flag word exists ?
.bss     gfl\ii, 2, 2
.global  gfl\ii
    .endif
  .endr
;
;***********************************************************************
;
;   Start of exeuctable code.
;
.text

         glbent  __reset     ;jumps here directly from reset vector
;
;   Initialize the interrupt system.
;
         clr     Iec0        ;disable all interrupts
         clr     Iec1
         clr     Iec2

.ifdef Ipc0                  ;init all interrupt priorties to 0 (disabled)
         clr     Ipc0
  .endif
.ifdef Ipc1
         clr     Ipc1
  .endif
.ifdef Ipc2
         clr     Ipc2
  .endif
.ifdef Ipc3
         clr     Ipc3
  .endif
.ifdef Ipc4
         clr     Ipc4
  .endif
.ifdef Ipc5
         clr     Ipc5
  .endif
.ifdef Ipc6
         clr     Ipc6
  .endif
.ifdef Ipc7
         clr     Ipc7
  .endif
.ifdef Ipc8
         clr     Ipc8
  .endif
.ifdef Ipc9
         clr     Ipc9
  .endif
.ifdef Ipc10
         clr     Ipc10
  .endif
.ifdef Ipc11
         clr     Ipc11
  .endif

         clr     Intcon1     ;initialize interrupt system to defaults
         clr     Intcon2
;
;   Set up the stack.
;
         mov     #__SPLIM_init, w0 ;initalize stack limit register
         mov     w0, Splim
         nop                 ;needed after changing SPLIM
         mov     #__SP_init, w15 ;initialize the stack pointer
;
;   Initialize all the global flags to off.
;
.irp     ii, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9
  .if \ii < nflagb           ;this GFLn flag word exists ?
         clr     gfl\ii
    .endif
  .endr
;
;   Initialize the separate modules.
;
         gcall   trap_init   ;init traps handler module
         gcall   port_init   ;init I/O ports
         gcall   task_init   ;init multi-tasking manager

         gjump   init        ;continue with system-wide initialization

.end